RTL Design Engineer

About This Role

Design, verify, and validate high-performance logic as an RTL Design Engineer, participating in all phases of product development from architecture to post-silicon validation. This role focuses on implementing interfaces for various high-speed protocols using SystemVerilog/Verilog and integrating custom IP with AMD's Vivado and Vitis ecosystems.

Responsibilities

• Participate in technical role in all phases of the product development cycle through implementation, prototyping, validation, productization and support including but not limited to architecture, design, and documentation for Ips
• Design, verify, and validate high-performance logic using SystemVerilog/Verilog, focusing on data and control path, implementing interfaces for PCIe (Gen 6/7), CXL, UAL, Ethernet, and DDR5/6
• Utilize the AMD (Xilinx) Vivado and Vitis ecosystems to integrate custom IP with the Network on Chip (NoC), Memory and other subsystems
• Perform pre-silicon verification and emulation to ensure functional correctness and performance
• Perform post-silicon validation, debugging complex interactions between the embedded software, Hard IPs and FPGA hardware fabric

Requirements

• Experience working with RTL Design
• FPGA experience in design, simulation, synthesis, implementation
• Vivado Experience
• Experience working with TCL, Python coding
• Experience with SystemVerilog/Verilog

Qualifications

• Bachelor’s degree or relevant experience

Skills

* Required skills