Programmable Logic Engineer

About This Role

Develop high-speed signal processing algorithms and network protocols for FPGAs, overseeing the complete design phase from requirements to integration.

Responsibilities

• Collaborate with team members to jointly develop high-speed digital signal processing and waveform processing algorithms supporting satellite communications applications
• Develop testbenches and help maintain and update system level verification environment
• Synthesize Verilog and System Verilog for Xilinx/AMD FPGAs
• Develop timing constraints, analyze timing results, and implement design changes required to close timing
• Generate and collaborate on required design documents, development requirements, specifications and verification protocols
• Own and drive technical issues to resolution
• Integrate and debug design in the laboratory

Requirements

• 5-8 years FPGA design experience, including Xilinx Vivado
• Strong knowledge of System Verilog
• Experience with RTL design for various signal processing blocks, including but not limited to equalizers, correlators, filters, FEC encoders and decoders
• Proven track record to design and implement FPGA modules using System Verilog with simulation and testbench development
• Ability to work independently, take initiative, and take ownership of tasks and results
• Strong written and verbal communication skills, ability to work with a geographically distributed team

Qualifications

• Bachelor's Degree in Electrical Engineering, Computer Engineering or a related field
• 5-8 years FPGA design experience

Nice to Have

• Familiarity with Matlab
• Experience with GitHub
• Experience with developing code for legacy Viasat modem platforms
• Familiarity with DVB-S2x and DVB-RCS2 standards
• Understanding and knowledge of Satellite communication waveforms and standards

Skills

* Required skills