Senior Verification Engineer – AI SoC Development

About This Role

As a Senior Verification Engineer, you will ensure the functional correctness and robustness of complex ASIC designs for AI workloads, playing a key role in Intel's AI SoC organization which develops cutting-edge products for next-generation AI applications.

Responsibilities

• Perform functional logic verification of integrated SoCs to ensure designs meet specifications
• Define and develop scalable and reusable block, subsystem, and SoC verification plans, test benches, and verification environments
• Execute verification plans, emulation, and system simulation models to verify designs, analyze power and performance, and uncover bugs
• Replicate, root cause, and debug issues in a presilicon environment, implementing corrective measures for failing tests
• Collaborate with SoC architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams to improve verification
• Document test plans and drive technical reviews with design and architecture teams, incorporating security activities
• Maintain and improve existing functional verification infrastructure and methodology
• Lead digital ASIC verification at block and system level for advanced AI SoCs
• Architect and develop SystemVerilog testbench infrastructure (UVM and non-UVM) for functional verification
• Mentor junior engineers and establish best practices for verification methodology

Requirements

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or Computer Science
• 7+ years of experience in ASIC/SoC verification
• Ability to lead projects, work cross-functionally, and deliver under tight schedules
• Strong communication skills and a collaborative mindset

Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or Computer Science
• 7+ years of experience in ASIC/SoC verification

Nice to Have

• Expertise in SystemVerilog and UVM methodology
• Strong understanding of digital design concepts, clock domain crossings, and power management
• Experience with verification of complex SoCs, including CPU subsystems and standard bus protocols (AXI, AHB)
• Familiarity with industry standard EDA tools, including simulators (VCS, Questa, Xcelium), coverage analysis tools, and modern waveform debug environments
• Scripting skills (Python, Perl, TCL) for automation

Skills

* Required skills

Benefits