ASIC/SoC Design Verification Engineer

About This Role

This role involves defining, documenting, and implementing detailed test plans for SoC design verification, building automation infrastructure, and developing reusable testbenches and test cases. The successful candidate will also define and measure function coverage to ensure design releases and tape-out are verified thoroughly.

Responsibilities

• Collaborate with design engineers and architects to define, document and implement detailed test plans for the SoC design verification
• Build and maintain infrastructure/environment for automation verification of SoC architecture, function and performance
• Develop reusable testbench, constrained-random/directed test cases, and verification associated behavioral module for both of block levels and system levels
• Develop regression strategy, methodology and tools(scripts)
• Define and measure the function coverage
• Close verification holes for design releases and tape-out
• Work with design engineers to debug and identify root causes of simulation failure
• Support test engineers for post-silicon validation
• Mentor and coach team members and junior engineers
• Drive verification efficiency

Requirements

• In-depth knowledge of UVM/OVM, Semiformal Verification, assertion-based verification, and hardware/software co-verification methodology
• Extensive experience building verification infrastructure, test planning, coverage closure, testbench and testcase development for function/performance verification
• Proficient experience with Verilog, System Verilog, Python/Perl/TCL/Shell scripting, C/C++, System C and industry mainstream ISAs assembly coding
• Familiarity with MIPI, AMBA (APB/AHB/AXI) bus protocol, RISC-V/ARM or DSP core
• Experience in verifying designs at both RTL level and post-P&R gate level
• Ability to work in a startup environment, independently and as a team player
• Ability to provide technical leadership to other members of the engineering team

Qualifications

• MS with 8+ years of relevant experience or PhD (with 3+ years of experience) in Electrical Engineering, Computer Engineering, Computer Science or related degree
• 8+ years with MS or 3+ years with PhD in relevant field

Nice to Have

• Working knowledge of AI/ML Computing, GPU, ISP architectures and accelerators
• Experience in verifying mix-signal design and interface of digital and analog
• Experience of design verification for highspeed IO such as PCIE and DDR

Skills

* Required skills